The present inventive concepts relate to a semiconductor device, and, in particular, to a semiconductor device with conductive interconnection lines.
In order to meet an increasing demand for a semiconductor device having small feature size, large capacity, and high density, it is essential to reduce a pitch of a metal line of a semiconductor device. The reduction in pitch of the metal line may lead to an increase in parasitic capacitance of a semiconductor device, and, as a result, the semiconductor device may suffer from deterioration in performance. Accordingly, various studies are being conducted to realize a semiconductor device including low-resistance metal lines and low-k dielectric materials without the technical issues, for example, the increase of the parasitic capacitance.